This new function allows the loop-back testing of PCM/FM, BPSK, QPSK & SOQPSK. Internal simulated data, available in the unit, includes PRN 11, PRN 15 (Pseudorandom Patterns) as well as the ability to generate and send an IRIG 106 Chapter 4 PCM Minor Frame test stream with programmable Frame Sync pattern and a programmable Minor Frame length. The simulator also generates Viterbi, Reed-Solomon, and LDPC, Forward Error Correction (FEC).The receiver can also provide Bit Error Rate Performance measurement as well as Frame Sync lock performance measurement, utilizing its built-in BERT and Frame Sync pattern detectors with programmable Search / Check / Lock and Flywheel parameters. This performance testing can be performed on both live and loop-back simulated data, all in the same box.
The Model 4426 offers unmatched performance, features, and functionality all contained in a single unit. If available at all, this level of functionality would normally require multiple boxes from other receiver vendors. Additionally, the Model 4426 is implemented totally with secure FPGA technology. It is designed as an appliance and is not built around a Personal Computer which has a cumbersome Operating System with corresponding security and performance issues.
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